Front-end electronic status Walter Bonivento INFN Cagliari 22/11/2006 Phone conference Status of CARDIAC production 1) PCB 9110 produced and delivered to the company 2) BOARD ASSEMBLY planning ; 4000- and 5110+ (according to P.C. table of 26/7 we need 5040+ 3540- INCLUDING SPARES) in production the last batch of 3000+ (DIALOG side completed) a) b) c) d) e) boards sent to Rome2 for burn in: 2474+ and 2609sent to LNF: 1196+ 926- (~100 sent back for repair or check) sent to CERN: 412+ 969boards to be sent soon to burn in: 700 plus some old shipping (small numbers~O(10)/shipping) the rest under connector assembling or reworking following a test failure 22/11/06 Muon front-end meeting Walter Bonivento - INFN Cagliari 2 Test bench The test bench, managed (and under the responsibility of) by G. Auriemma (INFN Roma, Univ Potenza), tests: 1) 2) 3) 4) 5) gain for individual channel with variable Cdet ENC for individual channel with variable Cdet cross talk missing output and input shorts This means that if you find broken connections, they broke with DHL… What it does not test: 1) 2) currents addresses Testing a little late wrt to burn-in: a few HW failures in recent times 22/11/06 Muon front-end meeting Walter Bonivento - INFN Cagliari 3 New noise findings Reminder: 1) no noise test required for test bench of CARDIAC’s ”the noise is measured at the chip testing company (Microtest)” 2) + chips showed only some more noise at the testing company (but only a factor of 50%) 3) fortunately a noise test was foreseen anyway in the board test bench 4) the boards were (successfully) validated on few chamber types for the PRR “anomalous” noise found in dressing chambers with positive boardslarge noise with large Cdet chambers in a large fraction of + boards the “anomalous” noise is also visible at test bench level, at large Cdet (N.B.:the reverse was not obvious due to simplified grounding in the test bench). SHORT TERM ACTION: a database from Giulio to select good boards to mount on large Cdet + chambers 22/11/06 Muon front-end meeting Walter Bonivento - INFN Cagliari 4 Technical details The origin of this noise was not found yet (I am in contact with W.Riegler to try to solve it) Facts (which might help to understand the cause): 1) single channel response and ENC is as expected at any Cdet. The noise curves for single channels are well behaved. 2) the observed “anomalous” noise is coherent i.e. when all channels are switched off but one, no problem. Otherwise the noise in much larger. 3) the effect is also present on the negative board but it is on the left side of the noise scan curve, so it is not an issue for these boards On the right side of the – boards there is no coherent noise at all and therefore the overall noise level is at single channel level 3) the effect is amplified at large Cdet; it grows much faster than linearly 4) not all the boards show it at the same level! it might depend on a finely tuned parameter… Missing: deep comparison of a silent + board and a noisy + board Not many (experienced) people available for deep testing… (me with a recently born baby…) 22/11/06 Muon front-end meeting Walter Bonivento - INFN Cagliari 5 Action plan If we do not succeed in finding the cause: 1) 2) 3) 4) 5) use Giulio’s database for immediate need of dressing test if the noisy boards can fit on the low Cdet chambers TO BE DONE IMMEDIATELY to see if it works if yes fine if not, we can modify the + noisy boards to become silent – boards (it works, I tested it switching one chip from + to -; by the way there is no significant difference in the feed currents with + or -) and modify some – to become + and test them and so on (this will let us save some money) … 22/11/06 Muon front-end meeting Walter Bonivento - INFN Cagliari 6 Ghosts There is no cross-talk among chips in the negative boards measurements up to very high charges and large Cdet do not show any effect; measurements done with both SPB types the effect mentioned by A.Vorobyev has to be traced to some other effect (chamber grounding…) There is no problem in the DIALOG delay settings DLL must be calibrated beforehand There is no significance dependance of the response on the the bias voltage in the well behaved boards measurement done on the CARDIACGEM (D.Raspino) 22/11/06 Muon front-end meeting Walter Bonivento - INFN Cagliari 7 Offset vs LV Supply Offset: soglia in mV a cui è massima la rate di conteggi, in funzione della tensione di alimentazione nell’intervallo 2.4÷2.6 V a step di 0.5 V Ch 0 Ch 1 Ch 4 Ch 5 Ch 2 Ch 3 Ch 6 Ch 7 L’offset aumenta linearmente in funzione della tensione Il canale 14 non è morto, si è rotto il pin di ingresso nella connessione della board al test bunch 22/11/06 Muon front-end meeting Ch 8 Ch 9 Ch 10 Ch 11 Walter Bonivento - INFN Cagliari Ch 12 Ch 13 Ch 14 Ch 15 8 Min Charge vs LV Supply Minimum detectable charge in funzione della tensione nell’intervallo 2.4÷2.6 V a step di 0.5 V. In questo intervallo di tensioni la min. detectable charge non sembra seguire alcun trend legato alla tensione di alimentazione. Ch 0 Ch 2 Ch 1 Ch 3 Ch 4 Ch 6 Ch 5 Ch 7 Ch 13 Ch 8 Ch 9 Ch 12 Ch 14 22/11/06 Muon front-end meeting Ch 10 Ch 11 Walter Bonivento - INFN Cagliari Ch 15 9 Sensitivity vs LV Supply Ch 0 Sensitivity in funzione della tensione nell’intervallo 2.4÷2.6 V a step di 0.5 V Nella maggior parte dei canali la sensitivity sembra diminuire in funzione della tensione. In modo minore nell’intervallo 2.45÷2.55 V Ch 1 Ch 4 Ch 5 Ch 3 Ch 2 Ch 6 Ch 7 Ch 8 Ch 9 Ch 12 Ch 13 Ch 10 Ch 14 Ch 11 22/11/06 Muon front-end meeting Walter Bonivento - INFN Cagliari Ch 15 10 Noise vs LV Supply Ch 0 Ch 5 Ch 4 Noise (a.u.) in funzione della tensione nell’intervallo 2.4÷2.6 V a step di 0.5 V Ch 1 Ch 3 Anche in questo caso non è presente alcun trend in funzione della tensione di alimentazione. Ch 6 Ch 7 Ch 2 Ch 13 Ch 8 Ch 9 Ch 12 Ch 14 Ch 10 22/11/06 Muon front-end meeting Ch 11 Walter Bonivento - INFN Cagliari Ch 15 11