Silicon photonics: a new technology platform to enable low cost and high performance photonics L P L. Pavesii L. Pavesi 18-11-10 Outline • • • • • Silicon Photonics State of the art Sili Silicon Photonics Ph t i ffor llab-on-a-chip b hi NanoSilicon photonics Conclusion L. Pavesi 18-11-10 Outline • • • • • Silicon Photonics State of the art Sili Silicon Photonics Ph t i ffor llab-on-a-chip b hi NanoSilicon photonics Conclusion L. Pavesi 18-11-10 L. Pavesi 18-11-10 Objective: reduce the cost per single transistor L. Pavesi 18-11-10 L. Pavesi 18-11-10 29 January 1969 L. Pavesi 18-11-10 L. Pavesi 18-11-10 vs Silicon Photonics vs. Silicon Photonics LD,PD, microrings, …. Silicon CMOS L. Pavesi 18-11-10 Silicon photonics Photonic devices produced within y and with standard silicon factory standard silicon processing L. Pavesi 18-11-10 Silicon pro’s pro s and cons • • • • Transparent p on 1.3-1.5 μ μm CMOS compatibility Low cost High index contrast, small footprint • • • • No electro-optic effect No detection in 1.3-1.5 μm region High index contrast coupling Lacks efficient light emission L. Pavesi 18-11-10 The Opportunity of Silicon Ph Photonics i • Enormous ($ billions) CMOS infrastructure, process learning, and capacity • Draft continued investment in Moore’s law • Potential to integrate multiple optical devices • Micromachining could provide smart packaging • Potential to converge computing & communications L. Pavesi 18-11-10 To o benefit be e t from o this t s optical opt ca wafers a e s must run alongside existing product. CMOS PHOTONICS Cost = paradigm change • 200 mm Si wafer has 125,000 - 0.5 mm sized dies • Cost processed CMOS wafers $2,000,000 • Cost per die: $16 • Laser size: 10x100 microns. • Cost per laser: $ 0.064 • This is just like estimating the cost of transistors. They are free. Only the PIC cost matters. • Emphasis is moved from components to the system L. Pavesi 18-11-10 Silicon photonics Basic building blocks L. Pavesi 18-11-10 L. Pavesi 18-11-10 L. Pavesi 18-11-10 L. Pavesi 18-11-10 L. Pavesi 18-11-10 L. Pavesi 18-11-10 Modulator Because of its crystal structure, silicon is not a useful conventional electro-optic material Because of its indirect bandgap, silicon has no near bandgap nonlinearities Thermo-optical effect is strong but slow The only effect that is left is the free carrier or Drude effect [ [ −22 −18 Δn = − 8.8 x 10 Δ N + 8.5 x 10 (Δ P) −18 −18 8 . 5 10 6 . 0 10 (Δ P) x x Δα = ΔN + L. Pavesi 18-11-10 ] ] 0.8 R.A. Soref and B.R. Bennett, IEEE JQE 23, 123 (1987) L. Pavesi 18-11-10 L. Pavesi 18-11-10 L. Pavesi 18-11-10 Photodetection Ge • Silicon does not absorb IR well Æ Use hybrid approach Æ Use U SiG SiGe or strained i d Ge G Æ Use damaged silicon Si L. Pavesi 18-11-10 L. Pavesi 18-11-10 Ge photodector L. Pavesi 18-11-10 IEF-LETI L. Pavesi 18-11-10 III-V heterogeneous integration for the laser source L. Pavesi 18-11-10 III-V heterointegration for the laser source L. Pavesi 18-11-10 L. Pavesi 18-11-10 L. Pavesi 18-11-10 L. Pavesi 18-11-10 L. Pavesi 18-11-10 L. Pavesi 18-11-10 Where should we integrate the photonics layer ? L. Pavesi 18-11-10 Options 1 L. Pavesi 18-11-10 Options 1 L. Pavesi 18-11-10 L. Pavesi 18-11-10 L. Pavesi 18-11-10 L. Pavesi 18-11-10 This requires Spotsize conversion structures Lateral coupling Vertical coupling fiber φ air d g r h x y • typically based on inverted tapers • spotsize: t i ~3 3 µm L. Pavesi 18-11-10 z • typically based on gratings • spotsize: t i ~ 10 µm e L. Pavesi 18-11-10 Outline • • • • • Silicon Photonics State of the art Sili Silicon Photonics Ph t i ffor llab-on-a-chip b hi NanoSilicon photonics Conclusion L. Pavesi 18-11-10 Explosion of silicon photonics L. Pavesi 18-11-10 From Building Block Research L. Pavesi 18-11-10 To Large scale integration Optical Fiber Multiplexor 25 modulators at 40Gb/s 25 hybrid lasers A future integrated 1 Tb/s optical link on a single silicon chip L. Pavesi 18-11-10 46 L. Pavesi 18-11-10 L. Pavesi 18-11-10 Silicon Photonic Link 50Gbps 50Gb Multichip approach Driver 45 nm CMOS Photonic 90 nm CMOS L. Pavesi 18-11-10 Outline • • • • • Silicon Photonics State of the art Sili Silicon Photonics Ph t i ffor llab-on-a-chip b hi NanoSilicon photonics Conclusion L. Pavesi 18-11-10 Nanosilicon photonics: a platform where silicon nanoclusters enable new functionalities in silicon photonics h t i L. Pavesi 18-11-10 Silicon Nanophotonics • Confine carriers on nanoscale dimensions • Confine photons on nanoscale dimensions 10 μm L. Pavesi 18-11-10 Silicon quantum dots L. Pavesi 18-11-10 50 nm Silicon quantum dots Egc-Si Bulk Silicon: Indirect band band-gap gap inefficient light emitter L. Pavesi 18-11-10 Nanocrystalline-Si: Direct-gap g p due to QCE Q Strong visible light emission L. Pavesi 18-11-10 L. Pavesi 18-11-10 Purcel effect L. Pavesi 18-11-10 Integration of microdisk with a waveguide L. Pavesi 18-11-10 THE all SILICON TR RANSC CEIVER pHotonics ELectronics functional Integration on CMOS CMOS capacitor based on Si-NC gate L. Pavesi 18-11-10 25/02/2010 Marconi, Anopchenko 59 RANSC CEIVER THE all SILICON TR pHotonics ELectronics functional Integration CMOS Light EmittingonProprieties L. Pavesi 18-11-10 Forward Bias Reverse Bias Poly p-type Luminescent Region -5 V Si substrate n-type Al + p-type silicon wafer - Active Si-NC n-type polysilicon ∼100 nm (2 nm SiO2 / 3 nm SRO) 1 Graded energy gap (2 nm SiO2 / 4 nm SRO) 0.1 0.2 Power effficiency (%) 2 Optical pow wer density (μW / cm ) pHotonics ELectronics functional Integration on CMOS 0.01 0.0 -3 10 -2 10 1 -1 10 2 Current density (mA / cm ) -3 10 L. Pavesi 18-11-10 0.1 -2 -1 1 10 10 2 Current density (mA / cm ) 1 10 THE all SILICON TR RANSC CEIVER pHotonics ELectronics functional Integration on CMOS L. Pavesi 18-11-10 Forward Bias Reverse Bias Poly p p-type type Si substrate n-type Al 25/02/2010 Detection R i Region pHotonics ELectronics functional Integration on CMOS TTL in TTL out L. Pavesi 18-11-10 25/02/2010 Marconi 63 All optical switching with silicon ili nanocrystals t l n=n0+n2 I α=α0+β I L. Pavesi 18-11-10 T = 1 − 2ξ (1 − ξ )(1 − cos Δϕ ) Comparison to other nonlinear materials i l Silica n2= (1.54x10-16) cm2/W [3,4] Bulk Silicon n2= (4.5x10-14) cm2/W [3,4] GaAs n2= (1.59x10-13) cm2/W [5] Si-ncs n2= (2 ÷ 8x10-13) cm2/W [present work] [3] Handbook of Nonlinear Optics [4] Adair R. et al., Physical Review B, 39, 3337, (February 1989). [[5]] M. Dinu et al.,, Applied pp Physics y Letters,, 82,, 2954 ((2003). ) L. Pavesi 18-11-10 All op optical ca sswitching c g Si nanocrystals activated slot waveguides L. Pavesi 18-11-10 A. Martinez et al. Nanoletters (2010) L. Pavesi 18-11-10 A. Martinez et al. Nanoletters (2010) Improved photovoltaic efficiency by appl ing novel applying no el effects at the limits of light-matter g interaction L. Pavesi 18-11-10 Improved photovoltaic efficiency by appl ing novel applying no el effects at the limits of light-matter g interaction L. Pavesi 18-11-10 Photon electron energy conversion 32.9% Unabsorbed energy loss 18.7% Heat loss 46.8% Other losses 1.6% Improved photovoltaic efficiency by appl ing novel applying no el effects at the limits of light-matter g interaction L. Pavesi 18-11-10 Improved photovoltaic efficiency by appl ing novel applying no el effects at the limits of light-matter g interaction Secondary carrier generation L. Pavesi 18-11-10 Ryan, Anopchenko, Marconi – APP FBK Improved photovoltaic efficiency by appl ing novel applying no el effects at the limits of light-matter g interaction Silicon nanocrystals L. Pavesi 18-11-10 Ryan, Anopchenko, Marconi – APP FBK Improved photovoltaic efficiency by appl ing novel applying no el effects at the limits of light-matter g interaction L. Pavesi 18-11-10 Ryan, Anopchenko, Marconi – APP FBK (b) PDS-2 TSRO Optica al function 0.8 0.3 RSRO ASRO 0.6 0.2 PR PRARC 0.4 ΔηINT 0.2 0.0 400 0.1 0.0 500 600 Wavelength (nm) L. Pavesi 18-11-10 P Photorespon nsivity (A/W)) Internal qu uantum efficciency enhancement 1.0 700 A maximum enhancement of the internal quantum efficiency of 14% Improve photovoltaic efficiency by appl ing novel applying no el effects at the limits of light-matter g interaction Secondary carrier generation L. Pavesi 18-11-10 Ryan, Anopchenko, Marconi – APP FBK - Minhaz Cross section of the device Al (1%Si) 500 nm Al (1%Si) 500 nm SiO2 (TEOS) 120 nm LOCOS 500 nm LPCVD Si3N4 50 nm n-type Poly-Si 30 nm Si--rich Oxide 50 nm Si P-type Si substrate Al (1%Si) 500 nm Device area = 320 μm X 320 μm L. Pavesi 18-11-10 Ryan, Anopchenko, Marconi – APP FBK - Minhaz LOCOS 500 nm Cross section of the device Al (1%Si) 500 nm Al (1%Si) 500 nm SiO2 (TEOS) 120 nm LPCVD Si3N4 50 nm n-type Poly-Si 30 nm Si--rich Oxide 50 nm Si LOCOS 500 nm absorption P-type Si substrate Al (1%Si) 500 nm Device area = 320 μm X 320 μm L. Pavesi 18-11-10 Ryan, Anopchenko, Marconi – APP FBK - Minhaz LOCOS 500 nm Cross section of the device Al (1%Si) 500 nm Al (1%Si) 500 nm SiO2 (TEOS) 120 nm LOCOS 500 nm LPCVD Si3N4 50 nm n-type Poly-Si 30 nm multiplication Si Si--rich Oxide 50 nm absorption P-type Si substrate Al (1%Si) 500 nm Device area = 320 μm X 320 μm L. Pavesi 18-11-10 Ryan, Anopchenko, Marconi – APP FBK - Minhaz LOCOS 500 nm P Photo-cu urrent (IL - ID) (m mA) IR response in Γ3N 10 1.0 0.5 > 1200 nm 00 0.0 -0.5 -1.0 10 -1.5 -2.0 20 -5 -4 -3 -2 -1 A li d Bias(V) Applied Bi (V) L. Pavesi 18-11-10 0 P Photo-cu urrent (IL - ID) (m mA) IR response in Γ3N 10 1.0 0.5 Voc= 500 mV > 1200 nm 00 0.0 -0.5 633 nm -1.0 10 488 nm -1.5 -2.0 20 -5 -4 -3 -2 -1 A li d Bias(V) Applied Bi (V) L. Pavesi 18-11-10 0 Phhoto-current (IL - ID) (m mA) IR response in Γ3N 10 1.0 0.5 Voc= 500 mV > 1200 nm 00 0.0 -0.5 633 nm + 1200 nm -1.0 10 488 nm + 1200 nm -1.5 -2.0 20 -5 -4 -3 -2 -1 A li d Bias(V) Applied Bi (V) L. Pavesi 18-11-10 0 Phhoto-current (IL - ID) (m mA) IR response in Γ3N 10 1.0 0.5 Voc= 500 mV > 1200 nm 00 0.0 -0.5 633 nm + 1200 nm 10 % -1.0 10 488 nm + 1200 nm -1.5 -2.0 20 -5 -4 -3 -2 -1 A li d Bias(V) Applied Bi (V) L. Pavesi 18-11-10 0 Solar cell with an internal gain mechanism Secondary carrier ge e at o generation L. Pavesi 18-11-10 Ryan, Anopchenko, Marconi – APP FBK - Minhaz Outline • • • • • Silicon Photonics State of the art Sili Silicon Photonics Ph t i ffor llab-on-a-chip b hi NanoSilicon photonics Conclusion L. Pavesi 18-11-10 Conclusions: • Silicon photonics is a mature technology • Silicon photonics allows fabricating thousands of p photonic components p in a single g chip p • Silicon photonics merges electronics and photonics to enable novel functionalities p • Silicon photonics is not only bulk Silicon (nanosilicon, strained silicon, silicon/germanium, germanium, ….) • Silicon photonics is not only optical communication is much more L. Pavesi 18-11-10 Bottom line: • Each time the market catches size Silicon is the solution • If you may want to compete with silicon silicon, do not! Silicon will always make it L. Pavesi 18-11-10 L. Pavesi 18-11-10 Acknowledgments • • • • • EC: Helios, LIMA, Wadimos, Positive PAT: Gopsi, Naomi MAE: Italy-turkey, mexico, romania HCSC project and OptoI ITPAR L. Pavesi 18-11-10 Acknowledgments g L. Pavesi 18-11-10