La partecipazione del gruppo di Bologna
(luminometro) alle attivita’ di ATLAS
A. Bertin, M. Bruschi, S. De Castro, L. Fabbri, P. Faccioli, B.
Giacobbe, F. Grimaldi, I. Massa, M. Piccinini, M. Poli, C. Sbarra,
N. Semprini-Cesari, R. Spighi, M. Villa, A. Vitale, A. Zoccoli
M. Bruschi-CSN1 Napoli
21 Settembre 2005
1
Contenuto
Le attività del gruppo di Bologna in ATLAS:
Test delle schede di elettronica del LVL1 per le
camere a Muoni
Luminometro (LUCID): elettronica di lettura e di
trigger + simulazioni
Presentazione del progetto
L’elettronica di LUCID e stime (preliminari) dei
costi
Altri interessi del gruppo:
Partecipazione alla fisica & trigger di alto livello:
fisica di alto Pt e diffrattiva
Partecipazione al computing
M. Bruschi-CSN1 Napoli
21 Settembre 2005
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Attività sul LVL1 a Bologna
Il test delle schede di elettronica del LVL1 (prodotte
da Roma1) per le camere a Muoni, verrà effettuato a
Bologna.
Inizio:
Test di:
Settembre 2005.
~800 Pad-OR
~800 mother boards
con test JTAG e ELMB
Rate di test richiesto: 7 board/day
Tempo previsto per il test del sistema: >6 mesi
M. Bruschi-CSN1 Napoli
21 Settembre 2005
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Attività sul LVL1 a Bologna - II
Prima riunione e trasporto del materiale il 7 Settembre.
La scorsa settimana testate le prime 20 schede OR
Le rimanenti schede OR (~800) in viaggio verso Bologna.
Inizio lavoro sistematico sull’intero sistema (OR+mother)
ad inizio Ottobre.
3 persone dedicate full-time al lavoro (2 su fondi
universitari) + altre a rotazione.
 Schedula dettagliata del test a Ottobre.
M. Bruschi-CSN1 Napoli
21 Settembre 2005
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ATLAS -LUMINOSITY
Importance of Luminosity measurements:
 Cross sections for “Standard “ processes
 t-tbar production
 W/Z production
 ……
Theoretically known to better than 10% ……will improve in the
future
 New physics manifesting in deviation of  x BR relative the
Standard Model predictions
 Important precision measurements
 Higgs production  x BR
 tan measurement for MSSM Higgs
 ……
M. Bruschi-CSN1 Napoli
21 Settembre 2005
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ATLAS –Luminosity (cont.)
Some examples
Higgs coupling
Relative precision on the measurement of
HBR for various channels, as function of mH,
at Ldt = 300 fb–1. The dominant uncertainty is
from Luminosity: 10% (open symbols), 5% (solid
symbols).
tan measurement
Systematic error dominated by luminosity
(ATLAS Physics TDR )
(ATLAS-TDR-15, May 1999)
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21 Settembre 2005
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ATLAS Luminosity Measurement Program
•
Relative luminosity a DEDICATED luminosity monitor is needed  LUCID
LUCID will provide the luminosity per BX as well
•
Absolute luminosity
– Goal:
• measure L with ≲ 2-3% accuracy
– How:
• LHC Machine parameters
• Use ZDC in heavy ion runs to understand machine parameters
• rates of well-calculable processes:e.g. QED, QCD
• optical theorem: forward elastic rate + total inelastic rate:
 Roman Pots
– needs ~full |η| coverage-ATLAS coverage limited
– Use tot measured by others (TOTEM)
– Combine machine luminosity with optical theorem
• luminosity from Coulomb Scattering
 Roman Pots
ATLAS pursuing all options
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21 Settembre 2005
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Motivations for LUCID
Requirements:
 A very radiation hard detector to be used as luminosity monitor
 Good time resolution to resolve individual beam crossings
 Insensitive to soft background particles
 Pointing capability
 A large dynamic range and no saturation at the highest luminosity
 A simple, robust and cheap construction
Solution:
LUCID: LUminosity measurement using a Cherenkov Integrating Detector
- The design is based on the Cherenkov Luminosity Counter (CLC) that is
operating successfully at CDF.
- Gas filled tubes around the beampipe act as a Cherenkov detector and
detects particles from the I.P. that are above the Cherenkov threshold
(2.7 GeV for pions and 9 MeV for electrons)
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Basics of the detector
2 detectors x 200 Al tubes filled with C4F10 or Isobutane
at atmospheric pressure
Beampipe
Winston cones at the end of the tubes focus the
Bruschi-CSN1 Napoli
Cherenkov light onto M.quartz
fibres
21 Settembre
2005
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The fibre read-out
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21 Settembre 2005
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General Considerations-I
The purpose of this talk is to describe a possible baseline for
the design of the ATLAS luminometer (LUCID) readout
electronics and trigger scheme.
•
•
•
•
Our aim (since last June) is to achieve, as soon as possible, the
following points:
Define the general scheme of the electronics
Tune, by MC simulation and test beam, the final design
parameters
Provide a cost estimate per readout channel and
time schedule for the realization of the electronics
Start as soon as possible with the design in order to be ready
in 2007
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General Considerations-II
Main Goals of the LUCID electronics:
1.
For each triggered event (ROD level):
 Number of tracks
 Tracks time of arrival
2. Monitor level
 Number of tracks per bunch
 Tracks time of arrival per bunch
3. Trigger Level
 Provide a fast trigger on “properly” filled bunch or on-time
events
 Provide a RAP-GAP vetoing for forward physics
Strategy: exploit available FED solutions where possible
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Known Facts
Signal from IP
Background from sec. vtx
Background from particles
crossing fibers
•Reject off - BX background sources (part of beam gas
interactions, satellites BX, interactions originating off-IP)
•Provide a detailed BX structure monitor
•Guarantee the selection of events in time with the readout
electronics of all the ATLAS detector 
IMPORTANT TOOL FOR THE WHOLE ATLAS DATA
TAKING
1) Amplitude meas. (2+1 bit @ L1)
2) Signal time-of-arrival
measurement (1 bit @L1)
3) Hit fibers pattern
(7x2 bit @L1)
• High Occupancy ~30% (at max. luminosity)
• Max. 3 tracks/tube (at max. luminosity)
•The amount of information to be handled @L1 can be encoded in 18 bit
•MAPMT and FE are in a low level radiation area for electronics (5 Gray/year)
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M. Bruschi-CSN1 Napoli
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System Architecture
VME BUS: TTCvi, CTRL sign.,etc
FRONT END (FEPCB)
22x2
M
A
P
M
T
Similar to Roman Pot FE:
OPERA/MAROC chip
Input: MAPMT
Output: DIGITIZED
INFORMATION on
LVDS Links (~0.5 Gb/s)
L
V
D
S
L
I
N
K
S
ROD
T
R
I
G
G.
ROD
ROD
C
A
R
D
ROD
PC
HV
FE CONTROL
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21 Settembre 2005
ROS
15
THE OPERA/MAROC CHIP
BLOCK FUNCTIONALITY DIAGRAM
9
1
Photons
Preamp.
Photomultiplicator
Bipolar
Fast Shaper
63
Unipolar
Fast Shaper
Gain correction
6 Bits
n=0..5)
SUM_OUT
9 Signal current
outputs
(sum over 7 out)
MUX_OUT
1 Multiplexed
current output
(for channel
monitor)
TRIG_OUT
Trigger
63 Trigger
outputs
x
2 bit/output/BX
on 9 LVDS TX
(2n-4,
4 discriminator thresholds
4 x 10 bits DACs
Modifications for Lucid in blue text
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21 Settembre 2005
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OPERA/MAROC chip : LAYOUT
– Technology: SiGe 0.35 m
– Submitted mid-June, expected mid
September
– Chip area : 12 mm2 (3.5mm *3.9mm)
– 64 channels, 3.5V power supply
–
Power consumption : 350 mW
– 228 pins
–A lot of flexibility:
• Gain adjustment per channel
(6 bits)
• 4 thresholds
• Multiplexed
currentmeasurement
1 tube  7 readout channel
1 mapmt  9 tubes
Output for LUCID:
9 current (sum over 7 channels)
1 current (multiplexed for channel
control)
63 x 2 bit (80 MHz clock, for trigger)
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1/9 data
from the
MAROC
CHIP
Single Tube Readout Unit
(7 channels)
LVDS
S/P
2
2
#1
2
1
2
TUBE
2
Fan
Out
Discr.
(Prog.
Thr
+NR)
MAROC CHIP
SUM_OUT
LHC Clock
TDC START
STOP
TDC
2
Window
Programmable
Comparator
GI
8 Multiplicity
+
per Tube
ADC
LUT
1
2
LUT
#7
18
(260 kB)
3
to the
trigger
unit
3
ADC GATE
STRU
25 ns
LHC Int. Time
time
ADC GATE
8
2
15 ns
int
10 ns
reset
TDC START
time
RAW DATA TO
READOUT per STRU ~ 5-6 Bytes/BX
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LUCID ROD BOARD (22 units + spares) – VME 9U
s-LINK Busy
to ROS
SUM_OUT 1_1
SUM_OUT 1_2
160 MB/s
~200 Bytes/ev
s-LINK
6 Bytes
stru 1
stru 2
Analog_In 1
6 Bytes
Analog_In 2
from CTRL LOGIC
from CTRL LOGIC
stru 20
SUM_OUT 2_10
LVDS 1_1
LVDS 1_2
LVDS 2_9
EVENT
BUFFER
DPRAM
DPRAM
6 Bytes
Analog_In 20
VME I.F
LVDS_In 1
LVDS_In 2
LVDS_In 18
LVDS 2_1 (to trig. unit)
3
3
LVDS
S/P
LVDS 2_2 (to trig. unit)
opt. lnk
from TTCIX
VME P1
LVDS
S/P
LVDS 1_1 (to trig. unit)
LVDS 1_2 (to trig. unit)
DPRAM
TTCRQ i.f.
3
CTRL
LOGIC
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LUCID TRIGGER BOARD (1 unit + spares) – VME 9U
s-LINK Busy
to ROS
160 MB/s
1
LVDS 1_1
43
D
e
t
e
c
t
o
r
44
1
2
LVDS 1_2
LVDS 22_1
LVDS 22_2
1
43
D
e
t
e
c
t
o
r
44
2
LVDS 23_1
2
LVDS 23_2
LVDS 44_1
LVDS 44_2
opt. lnk
from TTCIX
to the L0 trigger
s-LINK
~200 Bytes/ev
Signal
Buffer
44 ser. Inp
594 bit/BX
44 ser. Inp
594 bit/BX
FPGA based
TRIGGER
PROCESSING
UNIT
VME I.F
VME P1
Signal
Buffer
TTCRQ i.f.
CTRL
LOGIC
M. Bruschi-CSN1 Napoli
21 Settembre 2005
Algorithm:
MC simulations are needed
20
Description of the main building blocks of the readout electronics
 OPERA MAROC CHIP
• Adapted to LUCID needs from the RP design (ATLAS Orsay group)
 Gated Integrator + ADC
•
8 bit for the total sum
should be enough
•
Contacts have been taken with the LHCb preshower group (Clermont) for
adapting their GI+ADC solution

•
•
•
TDC
25 ns full range;
300 ps MAPMT resolution  7-8 bit
CERN HPTDC will be used (32 channel at 2MHz  2 channels at 32 MHz, but
still convenient)

•
•
•
LOGIC
Mainly Based on LUT (but still to be optimized)
IMPLEMENTED on FPGAs
Flexible and robust
 ENGINEERING
• Integration has to be studied but standard VME 9U will be probably preferred
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First Costs Estimate
Item
Q.ty Units
MAPMT
MAROC
2 unit/ROD
2 unit/ROD
UNIT COST TOTAL COST
(EURO)
(EURO)
MIN MAX
MIN
MAX
1600 1700
200 400
Comments
3200
400
3400
800 a multiproject of 20 keuro (shared?) is assumed for 50 chip
400
100
360
200
1060
400 suhner gx 02272 + SMB connectors
100 2x20 twisted pair cable
360
200
1060
150
10
35
100
200
50
75
100
20
20
500
100
350
100
200
50
75
1500
360
80
3315
750 purchased directly by LHCb outlet (2500 chip)
200 investigate LHCb PS FE solution
350 CERN HPTDC
100
200
50
75
2000
360
80
4165
100 100
200 200
50
50
75
75
1500 1500
100
200
50
75
1500
1925
100
200
50
75
1500
1925
FRONT END (FE)
coax cables (incl. connectors)
flat cables (incl.connectors)
LVDS TX
CTRL FPGA
TOTAL FRONT END (MATERIAL)/ROD
20
1
18
1
25m/ROD
25m/ROD
unit/ROD
unit/ROD
20
100
20
200
20
100
20
200
READ-OUT BOARD (ROD)
LHCb PS Gated Integrators
8 bit ADC 40 MSPS
TDC
TTCRQ
S-LINK (incl. cable)
VME IF FPGA
CTRL LOGIC FPGA
STRU LUT,DPRAM,EVENT BUFF. FPGA
LVDS RX
LVDS TX
TOTAL ROD (MATERIAL)
5
20
10
1
1
1
1
20
18
4
unit/ROD
unit/ROD
unit/ROD
unit/ROD
unit/ROD
unit/ROD
unit/ROD
unit/ROD
unit/ROD
unit/ROD
100
5
35
100
200
50
75
75
20
20
TOTAL
ITEM
MAPMT
MAROC
COSTS SUMMARY
UNITS
PROD
MIN
MAX
FACTOR (EURO) (EURO)
50
80000
85000
50
10000
20000
FE
ROD
TB
3
25
2
VME+PC
1
TOTAL
2
2
2
6360
165750
7700
6360
208250
7700
40500
40500
310310
367810
TRIGGER BOARD (TB)
TTCRQ
S-LINK (incl. cable)
VME IF FPGA
CTRL LOGIC FPGA
TRIGGER PROCESSING UNIT FPGA
TOTAL TB
1
1
1
1
1
unit/TB
unit/TB
unit/TB
unit/TB
unit/TB
VME+PC
VME 9U CRATES
VME CPU
PC
TOTAL SYSTEM
3 unit
3 unit
2 unit
7500 7500
4000 4000
3000 3000
22500 22500 2+1 spare
12000 12000 2+1 spare
6000 6000
40500 40500
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Tentative Time Schedule
2005
2006
2007
10 11 12 1 2 3 4 5 6 7 8 9 10 11 12 1 2 3 4 5 6 7 8 9 10 11 12
FE CARDS (3 units)
Tests on the available version of the MAROC chip
Design (incl. mechanics) frozen
Layout submitted (company will provide fully mounted prot+prod.)
Prototype board received
Prototypes tested
Electronics ready (full production)
Electronics installed
Installation tested
Electronics commissioned
ROD CARDS (25 units)
Design (incl. mechanics) frozen
Layout submitted (company will provide fully mounted prot+prod.)
Prototype board received
Prototypes tested
Electronics ready (full production)
Electronics installed
Installation tested
Electronics commissioned
TB (Trigger Board) (2 units)
Design (incl. mechanics) frozen
Layout submitted (company will provide fully mounted prot+prod.)
Prototype board received
Prototypes tested
Electronics ready (full production)
Electronics installed
Installation tested
Electronics commissioned
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Time Profile
Goals of the project
 Detector ready beginning 2007
 FED and ROD ready in 2007 in useful time before
the start of LHC operation
 Trigger Board before the end of 2007
Funding Profile according to these goals:
2006
ITEM
%
2007
kEuro
%
kEuro
MAPMT
MAROC
100
100
85.0
20.0
0
0
0.0
0.0
FE
ROD
TB
100
20
0
6.4
41.7
0.0
0
80
100
0.0
166.6
7.7
0
0.0
100
40.5
VME+PC
TOTAL
153.0
214.8
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Next Steps: System Optimization
(Test Beam & MC)
1.
Study the best solution for the tube readout (gas pressure,
number and type of fibers per tube, MAPMT type)  Test
Beam at DESY October
Main goals of the Test beam (1/10-14/11):
 Photon generation, transfer and losses
 Generation, processing and transmission of electrical signals
 Baseline Readout Device: MAPMT H 7546 (64 ch-UV glass
win.)
2. MC Study to refine design parameter (TDC & ADC resolution),
occupancy (# of channels), trigger algorithm
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TEST BEAM: the MAPMT-FIBERS
connection
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Richieste finanziarie 2006
(variazioni rispetto ai moduli in colore violetto)
Richieste finanziarie 2006:
M.I. : 21 k€ metabolismo
M.E. : 142.5 k€ metabolismo + test beam + C&I
Consumo: 21 k€ metabolismo (+5 k€ per l`attivita` sul
LVL1)
Inventario: 17.5 k€ farm di computing per analisi (Tier 3
like) in comune con il gruppo BO-RPC (responsabile per I 2
gruppi: F. Semeria)
Costruzione apparati: 270k€ (<350k€ ) per elettronica
LUCID
Comprendenti PM, Cavi, crates etc.
Trasporti: 3 k€  (per l`attivita` sul LVL1)
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Conclusions
• The Bologna Group activities in ATLAS are started I
many different areas.
• The group will test the LVL1 boards (~830 Pad-OR
and mother boards) in Bologna. The setting-up is
started. The systematic work will begin in October.
• The group is involved in the LUCID detector (lumi
monitor). Main activities are concerning:
– MC simulations
– Electronic design
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BACKUP
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Conclusions - II
• We are developing, based on the present knowledge of the
detector, a baseline design of the LUCID electronics
• We consider this baseline being in a quite advanced stage and
capable to fulfill the detector requirements (more: with the
TDC options LUCID become an IMPORTANT DETECTOR for
the ATLAS DATA TAKING)
• Forthcoming test beam and MC simulation will be valuable inputs
to improve (in case, simplifying) the design
• We have already solutions at hand for critical devices (frontend chip, G.I.,ADC, TDC) that make us confident for a start of
data taking together with LHC
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More infos
- Groups involved in LUCID:
University of Alberta, University & INFN Bologna, CERN,
University of Lund, University of Montreal, Max Planck
Institute, University of Manchester (?), SACLAY
Italy would represent ~50% of the group
- Total cost of the project for INFN :
~ 400 k€
Would represent ~50% of the total cost
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General Considerations-III
•
For the description of the readout electronics I will refer essentially to the
baseline of the detector described in the LOI
•
Detector:
formed by two parts each one consisting of 200 Cherenkov counters (tubes)
5 layers/section x 40 tubes/layer x 7 fibers/tube x 2 sections = 2800 fibers
•
Signal:
Prompt particles coming from the IP (primaries) will traverse the full length of
the counter and generate a large amplitude signal in the photo-detector
•
Background I:
Particles originating from secondary interaction of prompt particles in the
detector material and beam-pipe (secondaries) are softer and will traverse the
counters at larger angles (multiple reflections), with shorter path lengths
Background I significantly smaller than signal
Background II:
Particles crossing the readout fibers will produce light only on the crossed
fibers
 Background II will have different pattern of hit fibers wrt signal
•
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Signal amplitude measurement
• CLC have the important feature to guarantee a proportionality
between the number of primary particles traversing a single
tube and the resulting signal amplitude.
• These detectors response is not subjected to Landau
fluctuations (present in scintillators) and the counter’s
amplitude distribution will show distinct peaks for the different
particle multiplicities hitting the counters.
 LUCID, with an appropriate
readout and trigger system
can provide the
Total Tracks multiplicity per BX
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Signal time-of-arrival measurement
•
•
•

A “precise” measurement of the arrival time of a track in the
LUCID detector will help to:
Reject off - BX background sources (part of beam gas
interactions, satellites BX, interactions originating off-IP)
Provide a detailed BX structure monitor
Guarantee the selection of events in time with the readout
electronics of all the ATLAS detector 
IMPORTANT TOOL FOR THE WHOLE ATLAS DATA TAKING
Hit fibers pattern
Important to reject Background (essentially of type II)
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Location of the detector
Situation when the forward shielding is removed:
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