ESTREMO
Enhancement of conductance in integrated power devices by means
of strain effect and modulation techniques
•
ERC (Europen Research Council) Starting Grant
Research proposal
•
Partecipanti
1. ARCES (Advanced Research Center on Electronic Systems),
Facoltà di Ingegneria, Università di Bologna
2. CNR-IMM - Bologna
3. Texas Instruments, Inc., Dallas, Texas, USA
ESTREMO
• Com’è nato il consorzio
– collaborazione fra ARCES e T.I. USA già esistente sullo studio di
dispositivi per applicazioni Smart Power
– limitazioni nella conduzione dei transistor DMOS
» “… velocity saturation effects in the drift region limit the device conductance,
leading to a detrimental reduction of the maximum current drive at high
voltages and to a premature current saturation…”
– Nel progetto si indagheranno due aspetti
• strain engineering
• conductance modulation
ESTREMO
•
Comparison of the turn-on characteristic of the reference rugged LDMOS
with that of a “strained” one. A 5-MPa tensile stress along the transport
direction is applied under the STI region.
ESTREMO
• Coinvolgimento IMM
– Misure di deformazione reticolare in silicio
• CBED
• LACBED
• NBD (Nano Beam Diffraction)
– Misure in strutture ‘grandi’
• condizioni più rilassate per la misura
• possibilità di ottenere geometrie ‘ad hoc’ da T.I.
– strain uniassiali
– possibilità di sviluppo misure in campi di strain rapidamente
variabile
• È stata esplicitamente richiesta da ARCES la possibilità di inserire
nel progetto una parte di sviluppo metodologico della misura di
strain
ESTREMO
CBED
LACBED
NBD
ESTREMO – descrizione del lavoro
WP
Title
WP1
New concepts for strain engineering and conductance modulation
WP2
Device characterization and strain measurements
WP3
Test pattern fabrication
WP Leader
ARCES
ARCES/IMM
TI
ESTREMO – WP1
Task
Title
Months
T1.1
Acquisition of simulation tools for process-induced strain engineering.
M1-M3
T1.2
Investigation on locally strained devices with different crystal orientation and geometrical
parameters.
M4-M36
T1.3
Investigation on different conductance modulation approaches.
M4-M36
T1.4
Development of new models for the reliability analysis in LDMOS.
M4-M36
T1.5
Physical design of test structures and devices to be realized in test chip #1
M4-M8
T1.6
Physical design of best devices based on new concepts to be realized in test chip #2
M14-M18
T1.7
Physical design of best devices based on new concepts to be realized in test chip #3
M24-M28
ESTREMO – WP2-WP3
Title
Task
Months
T2.1
Electrical characterization of devices fabricated in test chip #1.
M12-M14
T2.2
Microstructure analysis of test modules #1
M12-M16
T2.3
Electrical characterization of devices fabricated in test chip #2.
M22-M24
T2.4
Microstructure analysis of test modules #2
M22-M26
T2.5
Electrical characterization of devices fabricated in test chip #3.
M32-M34
T2.6
Microstructure analysis of test modules #3
M32-M36
T2.7
Development of TEM/CBED measurements of non uniform strain fields.
M13-M36
Title
Task
Months
T3.1
Technology setup and layout design of test chip #1.
M4-M8
T3.2
Fabrication of test chip #1.
M8-M12
T3.3
Technology setup and layout design of test chip #2.
M14-M18
T3.4
Fabrication of test chip #2.
M18-M22
T3.5
Technology setup and layout design of test chip #3.
M24-M28
T3.6
Fabrication of test chip #3.
M28-M32
ESTREMO – Gantt chart e m/m
Y1
Y2
Y3
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
T1.1
T1.2
T1.3
T1.4
T1.5
T1.6
T1.7
T2.1
T2.3
T2.5
T2.2
T2.4
T2.6
T2.7
T3.1
T3.2
T3.3
T3.4
T3.5
T3.6
WP no.
Y1
Y2
Y3
Total
(P1)
Y1
Y2
Y3
Total
(P2)
Y1
Y2
IMM-CNR
ARCES
Y3
Total
Total
(P3)
(per WP)
TI
WP1
35
36
36
107
0
0
0
0
0
0
0
0
107
WP2
4
6
6
16
6
21
21
48
0
0
0
0
64
WP3
0
0
0
0
0
0
0
0
2
2
2
6
6
Total
39
42
42
123
6
21
21
48
2
2
2
6
177
ESTREMO - costs
Total Costs
of project:
Cost
Category
Year
1[1]
Year 22
Year 32
(by year and
total)
333780
325860
325860
Total
(Y1-3)2
985500
Cost category
Year 1
Year 2
Year 3
Total
Research staff
23200
37100
37100
97400
0
43700
43700
87400
4200
8500
8500
21200
27400
89300
89300
206000
Travel
5000
5000
5000
15000
Total other
costs
5000
5000
5000
15000
Total direct
costs
32400
94300
94300
221000
6480
18860
18860
44200
38880
113160
113160
265200
Short-term staff
Technical staff
Total personnel
Indirect costs
Total costs